The subject matter of the present application relates to dynamic random access memories (“DRAMs”) which typically are embodied as a specific DRAM chip for that purpose, or as a DRAM macro functional unit embodied within another type of chip which may also include a substantial amount of logic circuitry. More specifically, the present application relates to a method of erasing data stored within a DRAM.
Microelectronic elements, e.g., semiconductor chips, are thin, flat elements which can incorporate integrated circuits including active semiconductor devices such as transistors, diodes, etc., and wiring which provides electrical interconnections. Semiconductor chips may also or alternatively include passive devices such as capacitors, inductors or resistors. In particular constructions, a microelectronic element can include one or more semiconductor chips having an encapsulant on one or more surfaces thereof and having electrically conductive elements electrically connected with contacts of the one or more semiconductor chips, the contacts being exposed at a surface of the microelectronic element. In some cases, a microelectronic element can be a fan-out wafer level microelectronic unit containing one or more semiconductor chips in which an encapsulant covers at least edges of the one or more semiconductor chips, and in which electrically conductive traces extend along a surface of the one or more chips and onto a surface of the encapsulant beyond an edge of one or more chips.
A semiconductor chip can embody a dynamic random access memory (hereinafter “DRAM chip” or “DRAM”) having a memory storage array and circuitry for writing data to the storage array and reading the data stored therein. In operation of a typical conventional DRAM, data is written to and read from memory cells of the storage array by storing a high voltage or a low voltage on a storage capacitor of each memory cell. The high voltage typically represents a stored “1” and the low voltage typically represents a stored “0” in a binary data scheme. DRAMs are volatile memory, such that data remains stored on the storage capacitors therein so long as the DRAM remains powered on and is refreshed at required intervals. When power is removed from the DRAM, refreshing is no longer performed, and the voltage levels stored on the storage capacitors begin to decay. However, the data stored on the storage capacitors does not disappear immediately. Instead, the DRAM may need to remain powered off for several minutes before one can be sure that the stored data is erased.
In typical computing systems such as desktop, laptop, or tablet computers, and smartphones, one or more DRAM chips are used to provide active system memory for enabling active system operations for sound and display processing and a myriad of both built-in and user-selected add-on application programs or “apps”, e.g., for Internet access, media or music access, word processing, database access, presentations, and many others. For security, data stored in non-volatile disk drives or solid-state memory drives in computing systems can be encrypted. However, data used in active operation of the computing system, which is stored in active system memory, is not encrypted.
Because of the way DRAM chips operate as described above, data in active system memory therein can persist for several minutes even after the computing system is powered down. Thus, even when a laptop or smartphone computing system is powered down and then left unattended, or is placed in others' possession, such as when the user undergoes airport screening, there is a risk that a clever thief who steals the computing system could gain access to sensitive data that still persists in the computing system's DRAM-based active system memory.
Thus, it would be desirable to quickly erase the data stored in DRAM chips. This could help protect against theft of data from a computing system's active system memory. However, conventional DRAM chips do not provide a reliable way of quickly erasing data. When data needs to be erased, typical DRAM chips employ a conventional write operation to overwrite the data already stored therein with high or low voltages, or some pattern of high and low voltages. As a result, erasing the data in an entire DRAM chip can take as much time and resources to perform as it would to write data to fill the entire DRAM chip.
Ways of erasing data in DRAM chips are among the description provided by the following references: U.S. Pat. No. 7,751,263; 7,164,611; 5,255,223; 4,873,672; U.S. Pat. Pub. 20090016133; and Korean Pat. Pub. 2009-0105093.